FET phase shift oscillator

Posted by AJ × 06:42

• The amplifier stage is self biased with a capacitor bypassed source resistor Rs and

a drain bias resistor RD . The FET device parameters of interest are gm and rd.

• |A| = gmRL, where RL = (RDrd / RD + rd)

• At the operating frequency, we can assume that the input impedance of the

amplifier is infinite.

• This is a valid approximation provided, the oscillator operating frequency is low

enough so that FET capacitive impedances can be neglected.

• The output impedance of the amplifier stage given by RL should also be small

compared to the impedance seen looking into the feedback network so that no

attenuation due to loading occurs.

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