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Target code
mainly depends on available instruction set and efficient usage of registers.
The main issues in design of code generation are
• Intermediate
representation: Linear representation like postfix and three address code
or quadruples and graphical representation like Syntax tree or DAG. Assume type
checking is done and input in free of errors. This chapter deals only with intermediate
representation as three address code.
• Target Code:
The target code may be absolute code, re-locatable machine code or assembly
language code. Absolute code can be executed immediately as the addresses are
fixed. But in case of re-locatable it requires linker and loader to place the
code in appropriate location and map (link) the required library functions. If
it generates assembly level code then assemblers are needed to convert it into
machine level code before execution. Re-locatable code provides great deal of
flexibilities as the functions can be compiled separately before generation of
object code.
• Address
mapping: Address mapping defines the mapping between intermediate representations
to address in the target code. These addresses are based on the runtime
environment used like static, stack or heap. The identifiers are stored in symbol
table during declaration of variables or functions, along with type. Each identifier
can be accessed in symbol table based on width of each identifier and offset. The
address of the specific instruction (in three address code) can be generated
using back patching
• Instruction
Set: The instruction set should be complete in the sense that all operations
can be implemented. Some times a single operation may be implemented using many
instruction (many set of instructions). The code generator should choose the
most appropriate instruction. The instruction should be chosen in such a way
that speed is of execution is minimum or other machine related resource
utilization should be minimum.
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